(China (Mainland))
Product Summary
The EP1K50QI208-2 is an enhanced configuration device. It is a single-device, high-speed, advanced configuration solution for very high-density FPGAs. The core of the EP1K50QI208-2 is divided into two major blocks: a configuration controller and a flash memory. The flash memory is used to store configuration data for systems made up of one or more Altera FPGAs. Unused portions of the flash memory can be used to store processor code or data that can be accessed via the external flash interface after FPGA configuration is complete.
Parametrics
EP1K50QI208-2 absolute maximum ratings: (1)VCC Supply voltage: min=-0.2 V, max=4.6 V; (2)VI DC input voltage: min=-0.5 V, max=3.6 V; (3)IMAX DC VCC or ground current: ma=100 mA; (4)IOUT DC output current, per pin: min=-25 mA, max=25 mA; (5)PD Power dissipation: max=360 mW; (6)TSTG Storage temperature: min=-65℃, max=150℃; (7)TAMB Ambient temperature: min=-65℃, max=135℃; (8)TJ Junction temperature: max=135℃.
Features
EP1K50QI208-2 features: (1)Supports byte-wide configuration mode fast passive parallel (FPP); 8-bit data output per DCLK cycle; (2)Supports true n-bit concurrent configuration (n = 1, 2, 4, and 8) of Altera FPGAs; (3)Pin-selectable 2-ms or 100-ms power-on reset (POR) time; (4)Supply voltage of 3.3 V (core and I/O); (5)Hardware compliant with IEEE Std. 1532 in-system programmability (ISP)specification.
Diagrams
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 EP1K50QI208-2 |
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IC ACEX 1K FPGA 50K 208-PQFP |
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EP1K50QI208-2N |
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IC ACEX 1K FPGA 50K 208-PQFP |
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