(China (Mainland))
Product Summary
The CY7C1062AV33 is a high-performance CMOS Static RAM organized as 524,288 words by 32 bits. Writing to the device is accomplished by enabling the chip (CE1, CE2 and CE3 LOW) and forcing the Write Enable (WE)input LOW. If Byte Enable A (BA) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A18). If Byte Enable B (BB) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A18). Likewise, BC and BD correspond with the I/O pins I/O16 to I/O23 and I/O24 to I/O31, respectively. The CY7C1062AV33 is available in a 119-ball pitch ball grid array (PBGA) package.
Parametrics
Maximum ratings: (1)Storage Temperature: –65℃ to +150℃; (2)Ambient Temperature with Power Applied: –55℃ to +125℃; (3)Supply Voltage on VCC to Relative GND: –0.5V to +4.6V; (4)DC Voltage Applied to Outputs in High-Z State: –0.5V to VCC + 0.5V; (5)DC Input Voltage: –0.5V to VCC + 0.5V; (6)Current into Outputs (LOW): 20 mA.
Features
Features: (1)High speed: tAA = 8, 10, 12 ns; (2)Low active power: 1080 mW (max.); (3)Operating voltages of 3.3 ± 0.3V; (4)2.0V data retention; (5)Automatic power-down when deselected; (6)TTL-compatible inputs and outputs; (7)Easy memory expansion with CE1, CE2, and CE3 features.
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||
|---|---|---|---|---|---|---|---|---|---|---|
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 CY7C1062AV33 |
Other |
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Data Sheet |
Negotiable |
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CY7C1062AV33-10BGC |
Cypress Semiconductor |
SRAM 512K x 32 Fast Async COM |
Data Sheet |
Negotiable |
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CY7C1062AV33-10BGCT |
Cypress Semiconductor |
SRAM 512K x 32 Fast Async COM |
Data Sheet |
Negotiable |
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CY7C1062AV33-10BGIT |
Cypress Semiconductor |
SRAM 512K x 32 Fast Async IND |
Data Sheet |
Negotiable |
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CY7C1062AV33-10BGI |
Cypress Semiconductor |
SRAM 512K x 32 Fast Async IND |
Data Sheet |
Negotiable |
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